TOSHIBA SATELLITE X200 (LA-3441P) Отсутствуют звуковые устройства (Решено).

Relationship between HDA_DOCK_RST# and HDA_RST#
HDA_RST# will be asserted when a PLTRST# occurs or when the CRST# bit is 0. As long as HDA_RST# is asserted, the DOCK_RST# signal will also be asserted.
When PLTRST# is asserted, the DCKCTL.DA and DCKSTS.DM bits will be get cleared to
their default state (0's), and the dock state machine will be reset such that
HDA_DOCK_EN# will be de-asserted, and HDA_DOCK_RST# will be asserted. After any
PLTRST#, POST BIOS software is responsible for detecting that a dock is attached and
then writing a “1” to the DCKCTL.DA bit prior to the HD Audio Bus Driver de-asserting
CRST#.
When CRST# bit is “0” (asserted), the DCKCTL.DA bit is not cleared. The dock state
machine will be reset such that HDA_DOCK_EN# will be de-asserted,

HDA_DOCK_RST# will be asserted and the DCKSTS.DM bit will be cleared to reflect this
state. When the CRST# bit is de-asserted, the dock state machine will detect that
DCKCTL.DA is set to “1” and will begin sequencing through the dock process. Note that
this does not require any software intervention.

High Definition Audio Dock Enable: This signal controls the
external Intel HD Audio docking isolation logic. This is an active
low signal. When deasserted the external docking switch is in
isolate mode. When asserted the external docking switch
electrically connects the Intel HD Audio dock signals to the
corresponding Intel
®
ICH8 signals.
This signal is shared with GPIO33. This signal defaults to GPIO33
mode after PLTRST# reset and will be in the high state after
PLTRST# reset. BIOS is responsible for configuring GPIO33 to
HDA_DOCK_EN# mode.

High Definition Audio Dock Reset: This signal is a dedicated
HDA_RST# signal for the codec(s) in the docking station. Aside
from operating independently from the normal HDA_RST# signal,
it otherwise works similarly to the HDA_RST# signal.
This signal is shared with GPIO34. This signal defaults to GPIO34
mode after PLTRST# reset and will be in the low state after
PLTRST# reset. BIOS is responsible for configuring GPIO34 to
HDA_DOCK_RST# mode.

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