Here is the result of measurement of MOBO eprom:
- VDD= 5.3V
- RESET =5.3V
- #CE= 0V
- #OE =5.3V
- A0-A9 =5.3V; A10,A11 =0V ; A12-A17 =5.3V
- DQ0-DQ7 =0.9V
As I read in datasheet (in attachment) for W49F002U when #OE (output enable) is in High logic level (Vih) output is disabled. I don`t have enough expirience with this cind of problems and this is just common sence conclusion: If chip have disabled output how do I enable it? I tried to track where is it going and find nothing.
What about A11 and A12? Is it normal to all other adress imputs have 5.3V and they 0V?
Here is the result of measurement of MOBO eprom:
- VDD= 5.3V
- RESET =5.3V
- #CE= 0V
- #OE =5.3V
- A0-A9 =5.3V; A10,A11 =0V ; A12-A17 =5.3V
- DQ0-DQ7 =0.9V
As I read in datasheet (in attachment) for W49F002U when #OE (output enable) is in High logic level (Vih) output is disabled. I don`t have enough expirience with this cind of problems and this is just common sence conclusion: If chip have disabled output how do I enable it? I tried to track where is it going and find nothing.
What about A11 and A12? Is it normal to all other adress imputs have 5.3V and they 0V?